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ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory general description the ibutton ? temperature loggers (ds1922l/ds1922t) are rugged, self-sufficient systems that measure tempera-ture and record the result in a protected memory section. the recording is done at a user-defined rate. a total of 8192 8-bit readings or 4096 16-bit readings, taken at equidistant intervals ranging from 1s to 273hr, can be stored. additionally, 512 bytes of sram store application- specific information and 64 bytes store calibration data. a mission to collect data can be programmed to begin immediately, after a user-defined delay, or after a tempera- ture alarm. access to the memory and control functions can be password protected. the ds1922l/ds1922t are configured and communicate with a host-computing device through the serial 1-wire protocol, which requires only a single data lead and a ground return. eachds1922l/ds1922t is factory lasered with a guaranteed unique 64-bit registration number that allows for absolute traceability. the durable stainless-steel package is highly resistant to environmental hazards such as dirt, moisture, and shock. accessories permit the ds1922l/ds1922t to be mounted on almost any object, including containers, pallets, and bags. applications high-temperature logging (process monitoring,industrial temperature monitoring) temperature logging in cold chain, food safety, bio science, and pharmaceutical and medical products benefits and features ? high accuracy, full-featured digital temperature logger simplifies temperature data collection and dissemination of electronic temperature record ? temperature accuracy of 0.5c from -10c to +65c (ds1922l), 0.5c from +20c to +75c (ds1922t), with software corrections ? measures temperature with 8-bit (0.5c) or 11-bit (0.0625c) resolution ? operating temperature range: ds1922l: -40c to +85c; ds1922t: 0c to +125c ? automatically wakes up, measures temperature, and stores values in 8kb of data-log memory in 8- or 16-bit format ? sampling rate from 1s up to 273hr ? programmable high and low trip points for temperature alarms ? programmable recording start delay after elapsed time or upon a temperature alarm trip point ? 512 bytes of general-purpose memory plus 64 bytes of calibration memory ? two-level password protection of all memory and configuration registers ? individually calibrated in a nist-traceable chamber ? complies to standard en12830 ? rugged construction survives harsh environments ? water resistant enclosure (ip56) or waterproof if placed inside ds9107 ibutton capsule (exceeds water resistant 3 atm requirements) ? ce, fcc, and ul913 certifications ? simple se rial port interfaces to most microcontrollers for rapid data transfer ? comm unicates to host with a single digital signal up to 15.4kbps at standard speed or up to 125kbps in overdrive mode using 1-wire protocol ? quick access to alarmed devices through 1-wire conditional search function ordering information # denotes a rohs-compliant device that may include lead(pb) that is exempt under the rohs requirements. c ommon ibutton device features and pin configuration appear at end of data sheet. part temp range pin-package DS1922L-F5# -40c to +85c f5 can ds1922t-f5# 0c to +125c f5 can examples of accessories ibutton and 1-wire are registered trademarks of maxim integrated products, inc. part accessory ds9096p self-stick adhesive pad ds9101 multipurpose clip ds9093ra mounting lock ring ds9093a snap-in fob ds9092 ibutton probe 19-4990; rev 13; 3/15 downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 2 www.maximintegrated.com absolute maximum ratings electrical characteristics (v pup = +3.0v to +5.25v.) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. io voltage range to gnd ........................................-0.3v to +6v io sink current....................................................................20ma operating temperature range ds1922l ...........................................................-40? to +85? ds1922t ............................................................0? to +125? junction temperature ......................................................+150? storage temperature range* ds1922l..........................................................-40? to +85?* ds1922t ...........................................................0? to +125?* parameter symbol conditions min typ max units ds1922l (note 1) -40 +85 operating temperature t a ds1922t (note 1) 0 +125 c io pin: general data 1-wire pullup resistance r pup (notes 2, 3) 2.2 k input capacitance c io (note 4) 100 800 pf input load current i l io pin at v pup 6 10 a high-to-low switching threshold v tl (notes 5, 6) 0.4 3.2 v input low voltage v il (notes 2, 7) 0.3 v low-to-high switching threshold v th (notes 5, 8) 0.7 3.4 v switching hysteresis v hy (note 9) 0.09 n/a v output low voltage v ol at 4ma (note 10) 0.4 v standard speed, r pup = 2.2k 5 overdrive speed, r pup = 2.2k 2 recovery time (note 2) t rec overdrive speed, directly prior to reset pulse; r pup = 2.2k 5 s rising-edge hold-off time t reh (note 11) 0.6 2.0 s standard speed 65 overdrive speed, v pup > 4.5v 8 time-slot duration (note 2) t slot overdrive speed (note 12) 9.5 s io pin: 1-wire reset, presence-detect cycle standard speed, v pup > 4.5v 480 720 standard speed (note 12) 690 720 overdrive speed, v pup > 4.5v 48 80 reset low time (note 2) t rstl overdrive speed (note 12) 70 80 s standard speed, v pup > 4.5v 15 60 standard speed (note 12) 15 63.5 presence-detect high time t pdh overdrive speed (note 12) 2 7 s standard speed, v pup > 4.5v 1.5 5 standard speed 1.5 8 presence-detect fall time (note 13) t fpd overdrive speed 0.15 1 s * storage or operation above +50? significantly reduces battery life. downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 3 www.maximintegrated.com electrical characteristics (continued) (v pup = +3.0v to +5.25v.) parameter symbol conditions min typ max units standard speed, v pup > 4.5v 60 240 standard speed (note 12) 60 287 overdrive speed, v pup > 4.5v (note 12) 7 24 presence-detect low time t pdl overdrive speed (note 12) 72 8 s standard speed, v pup > 4.5v 65 75 standard speed 71.5 75 presence-detect sample time (note 2) t msp overdrive speed 8 9 s io pin: 1-wire write standard speed 60 120 overdrive speed, v pup > 4.5v (note 12) 6 12 write-zero low time (notes 2, 14) t w0l overdrive speed (note 12) 7.5 12 s standard speed 5 15 write-one low time (notes 2, 14) t w1l overdrive speed 1 1.95 s io pin: 1-wire read standard speed 5 15 - read low time (notes 2, 15) t rl overdrive speed 1 1.95 - s standard speed t rl + 15 read sample time (notes 2, 15) t msr overdrive speed t rl + 1.95 s real-time clock accuracy see rtc accuracy graphs min/ month -40c to +85c -300 +60 frequency deviation f 0c to +125c -600 +60 ppm temperature converter 8-bit mode 30 75 conversion time (note 16) t conv 16-bit mode (11 bits) 240 600 ms thermal response time constant (note 17) resp can package 130 s conversion error without software correction (notes 18, 19) see temperature accuracy graphs c conversion error with software correction (notes 19, 20) see temperature accuracy graphs c note 1: guaranteed by design, not production tested to -40? or +125?. note 2: system requirement. note 3: maximum allowable pullup resistance is a function of the number of 1-wire devices in the system and 1-wire recoverytimes. the specified value here applies to systems with only one device and with the minimum 1-wire recovery times. for more heavily loaded systems, an active pullup such as that found in the ds2480b may be required. note 4: capacitance on the data pin could be 800pf when v pup is first applied. if a 2.2k resistor is used to pull up the data line, 2.5? after v pup has been applied, the parasite capacitance does not affect normal communications. note 5: v tl and v th are functions of the internal supply voltage, which is a function of v pup and the 1-wire recovery times. the v th and v tl maximum specifications are valid at v pup = 5.25v. in any case, v tl < v th < v pup . note 6: voltage below which, during a falling edge on io, a logic 0 is detected. downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 4 www.maximintegrated.com note 7: the voltage on io must be less than or equal to v ilmax whenever the master drives the line low. note 8: voltage above which, during a rising edge on io, a logic 1 is detected. note 9: after v th is crossed during a rising edge on io, the voltage on io must drop by v hy to be detected as logic 0. note 10: the i-v characteristic is linear for voltages less than 1v. note 11: the earliest recognition of a negative edge is possible at t reh after v th has been previously reached. note 12: numbers in bold are not in compliance with the published ibutton device standards. see the comparison table . note 13: interval during the negative edge on io at the beginning of a presence-detect pulse between the time at which the voltageis 90% of v pup and the time at which the voltage is 10% of v pup . note 14: in figure 13 represents the time required for the pullup circuitry to pull the voltage on io up from v il to v th . the actual maximum duration for the master to pull the line low is t w1lmax + t f - and t w0lmax + t f - , respectively. note 15: in figure 13 represents the time required for the pullup circuitry to pull the voltage on io up from v il to the input-high threshold of the bus master. the actual maximum duration for the master to pull the line low is t rlmax + t f . note 16: to conserve battery power, use 8-bit temperature logging whenever possible. note 17: this number was derived from a test conducted by cemagref in antony, france, in july 2000:www.cemagref.fr/english/index.htm test report no. e42. note 18: includes +0.1/-0.2? calibration chamber measurement uncertainty. note 19: warning: maxim data-logger products are 100% tested and calibrated at time of manufacture to ensure that they meet all data sheet parameters, including temperature accuracy. as with any sensor-based product, user shall be responsible foroccasionally rechecking the temperature accuracy of the product to ensure it is still operating properly. furthermore, as with all products of this type, when deployed in the field and subjected to handling, harsh environments, or other hazards/ use conditions, there may be some extremely small but nonzero logger failure rate. in applications where the failure of any logger is a concern, user shall assure that redundant (or other primary) methods of testing and determining the handling methods, quality, and fitness of the articles and products are implemented to further mitigate any risk. note 20: assumes using calibration memory with calibration equations for error compensation. includes +0.1/-0.2? calibrationchamber measurement uncertainty. guaranteed by design. comparison table legacy values ds1922l/ds1922t values standard speed (s) overdrive speed (s) standard speed (s) overdrive speed (s) parameter min max min max min max min max t slot (including t rec ) 61 (undefined) 7 (undefined) 65 * (undefined) 9.5 (undefined) t rstl 480 (undefined) 48 80 690 720 70 80 t pdh 15 60 2 6 15 63.5 2 7 t pdl 60 240 8 24 60 287 7 28 t w0l 60 120 6 16 60 120 7.5 12 * intentional change; longer recovery time requirement due to modified 1-wire front-end. note: numbers in bold are not in compliance with the published ibutton device standards. ibutton can physical specification size see the package information section. weight ca. 3.3 grams electrical characteristics (continued) (v pup = +3.0v to +5.25v.) downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 5 www.maximintegrated.com ds1922l minimum product lifetime vs. temperature, slow samp ling 0 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 1 2 3 4 5 6 7 8 9 10 8-bit minimum product lifetime (years) temperature ( c) every minute no samples every 10 minutes every 60 minutes every 3 minutesoscillator off 0 1 2 3 4 5 6 7 8 9 10 11-bit minimum product lifetime (years) -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 temperature ( c) every minute no samples every 10 minutes every 60 minutes every 3 minutesoscillator off every 30 minutes every 300 minutes downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 6 www.maximintegrated.com ds1922l minimum product lifetime vs. temperature, fast samp ling 0 50 100 150 200 250 300 350 8-bit minimum product lifetime (days) -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 temperature ( c) every second every 30 seconds every 10 seconds every 3 secondsevery 60 seconds 0 20 40 60 80 100 11-bit minimum product lifetime (days) -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 temperature ( c) every second every 30 seconds every 10 seconds every 3 secondsevery 60 seconds downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 7 www.maximintegrated.com ds1922t minimum product lifetime vs. temperature, slow samp ling 0 1 2 3 4 5 6 7 8 9 10 8-bit minimum product lifetime (years) 0 10 20 30 40 50 60 70 80 90 100 110 120 temperature ( c) no samples every 60 minutes every 10 minutes every minute every 3 minutes oscillator off 0 1 2 3 4 5 6 7 8 9 10 11-bit minimum product lifetime (years) 0 10 20 30 40 50 60 70 80 90 100 110 120 temperature ( c) no samples every 60 minutes every 10 minutes every minute every 3 minutes oscillator off every 30 minutes every 300 minutes downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 8 www.maximintegrated.com ds1922t minimum product lifetime vs. temperature, fast samp ling 0 50 100 150 200 250 300 350 8-bit minimum product lifetime (days) 0 10 20 30 40 50 60 70 80 90 100 110 120 temperature ( c) every 30 seconds every 10 seconds every second every 3 seconds every 60 seconds 0 20 40 60 80 100 11-bit minimum product lifetime (days) 0 10 20 30 40 50 60 70 80 90 100 110 120 temperature ( c) every 30 seconds every 10 seconds every second every 3 seconds every 60 seconds downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 9 www.maximintegrated.com ds1922l minimum product lifetime vs. sample rate 0.01 0.01 0.1 1 10 100 0.1 1 10 minutes between samples 8-bit minimum product lifetime (years) +85 c +75 c +60 c -40 c +40 c 0 c 0.01 0.1 1 10 100 minutes between samples 0.001 0.01 0.1 1 10 11-bit minimum product lifetime (years) +85 c +75 c +60 c -40 c +40 c 0 c downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 10 www.maximintegrated.com ds1922t minimum product lifetime vs. sample rate 0.01 0.01 0.1 1 10 100 0.1 1 10 minutes between samples 8-bit minimum product lifetime (years) +125 c +110 c +95 c +85 c +75 c +60 c +40 c 0 c 0.001 0.01 0.1 1 10 0.01 0.1 1 10 100 minutes between samples 11-bit minimum product lifetime (years) +125 c +110 c +95 c +85 c +75 c +60 c +40 c 0 c downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 11 www.maximintegrated.com ds1922l temperature accuracy -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 error ( c) -40 note: the graphs are based on 11-bit data. -30 -20 -10 0 10 20 30 40 50 60 70 80 temperature ( c) uncorrected maximum error uncorrected minimum error sw corrected maximum error sw corrected minimum error ds1922t temperature accuracy -2.5 -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 error ( c) 0 note: the graphs are based on 11-bit data. 10 20 30 40 50 60 70 80 90 100 110 120 temperature ( c) uncorrected maximum error uncorrected minimum error sw corrected maximum error sw corrected minimum error downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 12 www.maximintegrated.com ds1922l rtc accuracy (typical) -5.0 -4.0 -3.0 -2.0 -1.0 0.0 1.0 2.0 drift (minutes/month) -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 temperature ( c) ds1922t rtc accuracy (typical) -12.0 -10.0 -8.0 -6.0 -4.0 -2.0 0.0 2.0 drift (minutes/month) 0 1 02 03 04 05 06 07 08 09 01 0 01 1 01 2 0 temperature ( c) downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 13 www.maximintegrated.com detailed description the ds1922l is an ideal device to monitor for extendedperiods of time the temperature of any object it is attached to or shipped with, such as fresh produce, medical drugs and supplies, and for use in refrigerators and freezers. with its shifted temperature range, the ds1922t is suited to monitor processes that require temperatures close to the boiling point of water, such as pasteurization of food items. note that the initial sealing level of the ds1922l/ds1922t achieves the equivalent of ip56. aging and use conditions can degrade the integrity of the seal over time, so for applications with significant exposure to liquids, sprays, or other similar environments, it is recommended to place the ds1922l/ds1922t in the ds9107 ibutton capsule. the ds9107 provides a watertight enclosure that has been rated to ip68 (refer to application note 4126: understanding the ip (ingress protection) ratings of ibutton data loggers and capsules ). software for setup and data retrieval through the 1-wire interface is avail-able for free download from the ibutton device website ( www.ibutton.com ). this software also includes drivers for the serial and usb port of a pc and routines toaccess the general-purpose memory for storing applica- tion-specific or equipment-specific data files. all ibutton data loggers are calibrated/validated against nist traceable reference devices. maxim offers a web application to generate validation certificates for the ds1922l, ds1922t, ds1922e, and ds1923 (tempera- ture portion only) data loggers. input is the device? rom code (or list of codes) and the output is a valida- tion certificate in pdf format. for more information, refer to application note 4629: ibutton data-logger calibration and nist certificate faqs . overview the block diagram in figure 1 shows the relationships between the major control and memory sections of the ds1922l/ds1922t. the devices have six main data components: 64-bit lasered rom; 256-bit scratchpad; 512-byte general-purpose sram; two 256-bit register pages of timekeeping, control, status, and counter reg- isters, and passwords; 64 bytes of calibration memory; and 8192 bytes of data-logging memory. except for the rom and the scratchpad, all other memory is arranged in a single linear address space. the data-logging memory, counter registers, and several other registers are read only for the user. both register pages are write protected while the device is programmed for a mis- sion. the password registers, one for a read password and another one for a read/write password, can only bewritten, never read. figure 2 shows the hierarchical structure of the 1-wire protocol. the bus master must first provide one of the eight rom function commands: read rom, match rom, search rom, conditional search rom, skip rom, overdrive-skip rom, overdrive-match rom, or resume. upon completion of an overdrive rom com- mand executed at standard speed, the device enters overdrive mode, where all subsequent communication occurs at a higher speed. the protocol required for these rom function commands is described in figure 11. after a rom function command is successfully exe- cuted, the memory and control functions become accessible and the master can provide any one of the eight available commands. the protocol for these mem- ory and control function commands is described in figure 9. all data is read and written least significant bit first. parasite power the block diagram (figure 1) shows the parasite-pow- ered circuitry. this circuitry ?teals?power whenever the io input is high. io provides sufficient power as long as the specified timing and voltage requirements are met. the advantages of parasite power are two- fold: 1) by parasiting off this input, battery power is not consumed for 1-wire rom function commands, and 2) if the battery is exhausted for any reason, the rom may still be read normally. the remaining circuitry of the ds1922 is solely operated by battery energy. 64-bit lasered rom each ds1922l/ds1922t contains a unique rom code that is 64 bits long. the first 8 bits are a 1-wire family code. the next 48 bits are a unique serial number. the last 8 bits are a cyclic redundancy check (crc) of the first 56 bits (see figure 3 for details). the 1-wire crc is generated using a polynomial generator consisting of a shift register and xor gates as shown in figure 4. the polynomial is x 8 + x 5 + x 4 + 1. additional information about the 1-wire crc is available in application note27: understanding and using cyclic redundancy checks with maxim ibutton products . the shift register bits are initialized to 0. then, startingwith the least significant bit of the family code, one bit at a time is shifted in. after the 8th bit of the family code has been entered, the serial number is entered. after the last bit of the serial number has been entered, the shift register contains the crc value. shifting in the 8 bits of crc returns the shift register to all 0s. downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 14 www.maximintegrated.com ds1922lds1922t general-purpose sram (512 bytes) calibration memory (64 bytes) register pages (64 bytes) memory function control 64-bit lasered rom 256-bit scratchpad control logic 32.768khz oscillator 3v lithium io thermal sense adc data-log memory 8kb internal timekeeping, control registers, and counters rom function control 1-wire port parasite-poweredcircuitry figure 1. block diagram downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 15 www.maximintegrated.com available commands: data field affected: read rom match rom search rom conditional search rom skip rom resume overdrive-skip rom overdrive-match rom 64-bit rom, rc-flag64-bit rom, rc-flag 64-bit rom, rc-flag 64-bit rom, rc-flag, alarm flags, search conditions rc-flag rc-flag rc-flag, od-flag 64-bit rom, rc-flag, od-flag 1-wire rom function commands write scratchpadread scratchpad copy scratchpad with pw read memory with pw and crc clear memory with pw forced conversion start mission with pw stop mission with pw 256-bit scratchpad, flags256-bit scratchpad 512-byte data memory, registers, flags, passwords memory, registers, passwords mission timestamp, mission samples counter, start delay, alarm flags, passwords memory addresses 020ch to 020dh flags, timestamp, memory addresses 020ch to 020dh (when logging) flags ds1922l/ds1922t-specific memory/control function commands command level: bus master 1-wire net other devices ds1922l/ds1922t figure 2. hierarchical structure for 1-wire protocol msb 8-bit crc code 48-bit serial number msb msb lsb lsblsb 8-bit family code (41h) msb lsb figure 3. 64-bit lasered rom 1st stage 2nd stage 3rd stage 4th stage 7th stage 8th stage 6th stage 5th stage x 0 x 1 x 2 x 3 x 4 polynomial = x 8 + x 5 + x 4 + 1 input data x 5 x 6 x 7 x 8 figure 4. 1-wire crc generator downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 16 www.maximintegrated.com memory figure 5 shows the ds1922l/ds1922t memory map. pages 0 to 15 contain 512 bytes of general-purpose sram. the various registers to set up and control the device fill pages 16 and 17, called register pages 1 and 2 (see figure 6 for details). pages 18 and 19 pro- vide storage space for calibration data. they can alter- natively be used as an extension of the general- purpose memory. the data-log logging memory starts at address 1000h (page 128) and extends over 256 pages. the memory pages 20 to 127 are reserved for future extensions. the scratchpad is an additional page that acts as a buffer when writing to the sram memory or the register pages. the data memory can be written at any time. the calibration memory holds data from the device calibration that can be used to further improve the accuracy of 11-bit temperature readings. see the software correction algorithm for temperature section for details. the last byte of the calibration memory pagestores an 8-bit crc of the preceding 31 bytes. page 19 is an exact copy of the data in page 18. while calibra- tion memory can be overwritten by the user, this is not recommended. see the security by password section for ways to protect the memory. the access type for theregister pages is register-specific and depends on whether the device is programmed for a mission. figure 6 shows the details. the data-log memory is read only for the user. it is written solely under supervision of the on-chip control logic. due to the special behavior of the write access logic (write scratchpad, copy scratchpad), it is recommended to only write full pages at a time. this also applies to the register pages and the calibra- tion memory. see the address registers and transfer status section for details. 32-byte intermediate storage scratchpad address 0000h to 001fh 32-byte general-purpose sram (r/w) page 0 0020h to 01ffh general-purpose sram (r/w) pages 1 to 15 0200h to 021fh 32-byte register page 1 page 16 0220h to 023fh 32-byte register page 2 page 17 0240h to 025fh calibration memory page 1 (r/w) page 18 0260h to 027fh calibration memory page 2 (r/w) page 19 0280h to 0fffh (reserved for future extensions) pages 20 to 127 1000h to 2fffh data-log memory (read only) pages 128 to 383 figure 5. memory map downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 17 www.maximintegrated.com address bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 function access* 0200h 0 10 seconds single seconds 0201h 0 10 minutes single minutes 0202h 0 12/24 20 hour am/pm 10 hour single hours 0203h 0 0 10 date single date 0204h cent 0 0 10 months single months 0205h 10 years single years real- time clock registers r/w r 0206h low byte 0207h 0 0 high byte sample rate r/w r 0208h low threshold 0209h high threshold temperature alarms r/w r 020ah (no function with the ds1922l/ds1922t) 020bh (no function with the ds1922l/ds1922t) r/w r 020ch low byte 0 0 0 0 0 020dh high byte latest temperature r r 020eh (no function with the ds1922l/ds1922t) 020fh (no function with the ds1922l/ds1922t) r r 0210h 0 0 0 0 0 0 etha etla temperature alarm enable r/w r 0211h 1 1 1 1 1 1 0 0 r/w r 0212h 0 0 0 0 0 0 ehss eosc rtc control r/w r 0213h 1 1 suta ro (x) tlfs 0 etl mission control r/w r 0214h bor 1 1 1 0 0 thf tlf alarm status r r 0215h 1 1 0 wfta memclr 0 mip 0 general status r r 0216h low byte 0217h center byte 0218h high byte start delay counter r/w r figure 6. register pages map * the left entry in the access column is valid between missions. the right entry shows the applicable access type while a mission is in progress. downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 18 www.maximintegrated.com address bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 function access* 0219h 0 10 seconds single seconds 021ah 0 10 minutes single minutes 021bh 0 12/24 20 hour am/pm 10 hour single hours 021ch 0 0 10 date single date 021dh cent 0 0 10 months single months 021eh 10 years single years mission timestamp r r 021fh (no function; reads 00h) r r 0220h low byte 0221h center byte 0222h high byte mission samples counter r r 0223h low byte 0224h center byte 0225h high byte device samples counter r r 0226h configuration code flavor r r 0227h epw pw control r/w r 0228h first byte 022fh eighth byte read access password w 0230h first byte 0237h eighth byte full access password w 0238h 023fh (no function; all these bytes read 00h) r r figure 6. register pages map (continued) * the left entry in the access column is valid between missions. the right entry shows the applicable access type while a mission is in progress. downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 19 www.maximintegrated.com detailed register descriptions timekeeping and calendar the rtc and calendar information is accessed by reading/writing the appropriate bytes in the register page, address 0200h to 0205h. for readings to be valid, all rtc registers must be read sequentially start- ing at address 0200h. some of the rtc bits are set to 0. these bits always read 0 regardless of how they are written. the number representation of the rtc registers is binary-coded decimal (bcd) format. the ds1922l/ds1922t? rtc can run in either 12hr or 24hr mode. bit 6 of the hours register (address 0202h) is defined as the 12hr- or 24hr-mode select bit. when high, the 12hr mode is selected. in the 12hr mode, bit 5 is the am/pm bit with logic 1 being pm. in the 24hr mode, bit 5 is the 20hr bit (20hr to 23hr). the cent bit, bit 7 of the months register, can be written by the user. this bit changes its state when the years counter transi- tions from 99 to 00. the calendar logic is designed to automatically com- pensate for leap years. for every year value that is either 00 or a multiple of 4, the device adds a 29th offebruary. this works correctly up to (but not including) the year 2100. sample rate the content of the sample rate register (addresses 0206h, 0207h) specifies the time elapse (in seconds if ehss = 1, or minutes if ehss = 0) between two tem- perature-logging events. the sample rate can be any value from 1 to 16,383, coded as an unsigned 14-bit binary number. if ehss = 1, the shortest time between logging events is 1s and the longest (sample rate = 3fffh) is 4.55hr. if ehss = 0, the shortest is 1min and the longest time is 273.05hr (sample rate = 3fffh). the ehss bit is located in the rtc control register at address 0212h. it is important that the user sets the ehss bit accordingly while setting the sample rate register. writing a sample rate of 0000h results in a sample rate = 0001h, causing the ds1922l/ds1922tto log the temperature either every minute or every second depending upon the state of the ehss bit. sample rate register bitmap address bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0206h sample rate low 0207h 0 0 sample rate high rtc registers bitmap address bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0200h 0 10 seconds single seconds 0201h 0 10 minutes single minutes 0202h 0 12/24 20 hour am/pm 10 hour single hours 0203h 0 0 10 date single date 0204h cent 0 0 10 months single months 0205h 10 years single years note: during a mission, there is only read access to these registers. bit cells marked ??always read 0 and cannot be written to 1. note: during a mission, there is only read access to these registers. bit cells marked ??always read 0 and cannot be written to 1. downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 20 www.maximintegrated.com temperature conversion the ds1922l? temperature range begins at -40? and ends at +85?. the temperature range for the ds1922t begins at 0 and ends at +125?. temperature values are represented as an 8-bit or 16-bit unsigned binary number with a resolution of 0.5? in 8-bit mode and 0.0625? in 16-bit mode. the higher temperature byte trh is always valid. in 16-bit mode, only the three highest bits of the lower byte trl are valid. the five lower bits all read 0. trl is undefined if the device is in 8-bit temperature mode. an out-of-range temperature reading is indicated as 00h or 0000h when too cold and ffh or ffe0h when too hot. with trh and trl representing the decimal equivalent of a temperature reading, the temperature value is cal- culated as: ? (?) = trh/2 - 41 + trl/512 (16-bit mode, tlfs = 1, see address 0213h) ? (?) = trh/2 - 41 (8-bit mode, tlfs = 0, see address 0213h) this equation is valid for converting temperature read-ings stored in the data-log memory as well as for data read from the latest temperature conversion result register. the ?41?applies to the ds1922l. for the ds1922t, use ?1?instead of ?41. to specify the temperature alarm thresholds, the previ- ous equations are resolved to: talm = 2 x ? (?) + 82 the ?82?applies to the ds1922l. for the ds1922t, use?2.?because the temperature alarm threshold is only one byte, the resolution or temperature increment is limit- ed to 0.5?. the talm value must be converted into hexadecimal format before it can be written to one of the temperature alarm threshold registers (low alarm address 0208h; high alarm address 0209h). independent of the conversion mode (8-bit or 16-bit), only the most significant byte of a temperature conver- sion is used to determine whether an alarm is generated. latest temperature conversion result register bitmap address bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 byte 020ch t2 t1 t0 0 0 0 0 0 trl 020dh t10 t9 t8 t7 t6 t5 t4 t3 trh table 1. temperature conversion examples trh trl (c) mode hex decimal hex decimal ds1922l ds1922t 8-bit 54h 84 1.0 41.0 8-bit 17h 23 -29.5 10.5 16-bit 54h 84 00h 0 1.000 41.000 16-bit 17h 23 60h 96 -29.3125 10.6875 talm (ds1922t) talm (ds1922l) (c) hex decimal (c) hex decimal 65.5 85h 133 25.5 85h 133 30.0 3eh 62 -10.0 3eh 62 table 2. temperature alarm threshold examples downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 21 www.maximintegrated.com temperature sensor alarm the ds1922l/ds1922t have two temperature alarm threshold registers (address 0208h, 0209h) to store values that determine whether a critical temperature has been reached. a temperature alarm is generated if the device measures an alarming temperature and the alarm signaling is enabled. the bits etla and etha that enable the temperature alarm are located in the temperature sensor control register. the temperature alarm flags tlf and thf are found in the alarm status register at address 0214h. bit 1: enable temperature high alarm (etha). this bit controls whether, during a mission, the temperaturehigh alarm flag (thf) can be set, if a temperature con- version results in a value equal to or higher than the value in the temperature high alarm threshold register. if etha is 1, temperature high alarms are enabled. if etha is 0, temperature high alarms are not generated. bit 0: enable temperature low alarm (etla). this bit controls whether, during a mission, the temperaturelow alarm flag (tlf) can be set, if a temperature con- version results in a value equal to or lower than the value in the temperature low alarm threshold register. if etla is 1, temperature low alarms are enabled. if etla is 0, temperature low alarms are not generated. rtc control to minimize the power consumption of the ds1922l/ ds1922t, the rtc oscillator should be turned off when these devices are not in use. the oscillator on/off bit is located in the rtc control register. this register also includes the ehss bit, which determines whether the sample rate is specified in seconds or minutes. bit 1: enable high-speed sample (ehss). this bit controls the speed of the sample rate counter. when setto logic 0, the sample rate is specified in minutes. when set to logic 1, the sample rate is specified in seconds. bit 0: enable oscillator (eosc). this bit controls the crystal oscillator of the rtc. when set to logic 1, theoscillator starts. when written to logic 0, the oscillator stops and the device is in a low-power data-retention mode. this bit must be 1 for normal operation. a forced conversion or start mission command automati- cally starts the rtc by changing the eosc bit to logic 1. temperature sensor control register bitmap address bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0210h 0 0 0 0 0 0 etha etla rtc control register bitmap address bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0212h 0 0 0 0 0 0 ehss eosc note: during a mission, there is only read access to this register. bits 2 to 7 have no function. they always read 0 and cannot be written to 1. note: during a mission, there is only read access to this register. bits 2 to 7 have no function. they always read 0 and cannot be written to 1. downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 22 www.maximintegrated.com mission control the ds1922l/ds1922t are set up for operation by writ- ing appropriate data to the special function registers, which are located in the two register pages. the set- tings in the mission control register determine which format (8 or 16 bits) applies and whether old data can be overwritten by new data once the data-log memory is full. an additional control bit can be set to tell the ds1922l/ds1922t to wait with logging data until a tem- perature alarm is encountered. bit 5: start mission upon temperature alarm (suta). this bit specifies whether a mission begins immediately (includes delayed start) or if a temperaturealarm is required to start the mission. if this bit is 1, the device performs an 8-bit temperature conversion at the selected sample rate and begins with data logging only if an alarming temperature (high alarm or low alarm) was found. the first logged temperature is when the alarm occurred. however, the mission sample counter does not increment. this functionality is guaranteed by design and not production tested. bit 4: rollover control (ro). this bit controls whether, during a mission, the data-log memory is overwrittenwith new data or whether data logging is stopped once the data-log memory is full. setting this bit to 1 enables the rollover and data logging continues at the begin- ning, overwriting previously collected data. if this bit is 0, the logging and conversions stop once the data-log memory is full. however, the rtc continues to run and the mip bit remains set until the stop mission command is performed. bit 2: temperature logging format selection (tlfs). this bit specifies the format used to store tem- perature readings in the data-log memory. if this bit is0, the data is stored in 8-bit format. if this bit is 1, the 16-bit format is used (higher resolution). with 16-bit for- mat, the most significant byte is stored at the lower address. bit 0: enable temperature logging (etl). to set up the device for a temperature-logging mission, this bitmust be set to logic 1. the recorded temperature val- ues start at address 1000h. mission control register bitmap address bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0213h 1 1 suta ro (x) tlfs 0 etl note: during a mission, there is only read access to this register. bits 6 and 7 have no function. they always read 1 and cannot be written to 0. bits 1 and 3 control functions that are not available with the ds1922l/ds1922t. bit 1 must be set to 0. under this condi- tion the setting of bit 3 becomes a ?on? care. downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 23 www.maximintegrated.com alarm status the fastest way to determine whether a programmed temperature threshold was exceeded during a mission is by reading the alarm status register. in a networked environment that contains multiple ds1922l/ ds1922t devices, the devices that encountered an alarm can quickly be identified by means of the conditional search command (see the 1-wire rom function commands section). the temperature alarm only occurs if enabled (see the temperature sensor alarm section). the bor alarm is always enabled. bit 7: battery-on reset alarm (bor). if this bit reads 1, the device has performed a power-on reset. thisindicates that the device has experienced a shock big enough to interrupt the internal battery power supply. the device can still appear functional, but it has lost its factory calibration. any data found in the data-log mem- ory should be disregarded. bit 1: temperature high alarm flag (thf). if this bit reads 1, there was at least one temperature conversionduring a mission revealing a temperature equal to or higher than the value in the temperature high alarm register. a forced conversion can affect the thf bit. this bit can also be set with the initial alarm in the suta = 1 mode. bit 0: temperature low alarm flag (tlf). if this bit reads 1, there was at least one temperature conversionduring a mission revealing a temperature equal to or lower than the value in the temperature low alarm reg- ister. a forced conversion can affect the tlf bit. this bit can also be set with the initial alarm in the suta = 1 mode. general status the information in the general status register tells the host computer whether a mission-related command was executed successfully. individual status bits indi- cate whether the ds1922l/ds1922t are performing a mission, waiting for a temperature alarm to trigger the logging of data, or whether the data from the latest mis- sion has been cleared. bit 4: waiting for temperature alarm (wfta). if this bit reads 1, the mission start upon temperature alarmwas selected and the start mission command was suc- cessfully executed, but the device has not yet experi- enced the temperature alarm. this bit is cleared after a temperature alarm event, but is not affected by the clear memory command. once set, wfta remains set if a mission is stopped before a temperature alarm occurs. to clear wfta manually before starting a new mission, set the high temperature alarm (address 0209h) to -40? and perform a forced conversion. bit 3: memory cleared (memclr). if this bit reads 1, the mission timestamp, mission samples counter, andall the alarm flags of the alarm status register have been cleared in preparation of a new mission. executing the clear memory command clears these memory sections. the memclr bit returns to 0 as soon as a new mission is started by using the start mission command. the memory must be cleared for a mission to start. bit 1: mission in progress (mip). if this bit reads 1, the device has been set up for a mission and this mission isstill in progress. the mip bit returns from logic 1 to logic 0 when a mission is ended. see the start mission with password and stop mission with password sections. alarm status register bitmap address bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0214h bor 1 1 1 0 0 thf tlf general status register bitmap address bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0215h 1 1 0 wfta memclr 0 mip 0 note: there is only read access to this register. bits 4 to 6 have no function. they always read 1. bits 2 and 3 have no function wit h the ds1922l/ds1922t. they always read 0. the alarm status bits are cleared simultaneously when the clear memory function is invoked. see the memory and control function commands section for details. note: there is only read access to this register. bits 0, 2, 5, 6, and 7 have no function. downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 24 www.maximintegrated.com mission start delay the content of the mission start delay counter register tells how many minutes must expire from the time a mission was started until the first measurement of the mission takes place (suta = 0) or until the device starts testing the temperature for a temperature alarm (suta = 1). the mission start delay is stored as an unsigned 24-bit integer number. the maximum delay is 16,777,215min, equivalent to 11,650 days or roughly 31 years. if the start delay is nonzero and the suta bit is set to 1, first the delay must expire before the device starts testing for temperature alarms to begin logging data. for a typical mission, the mission start delay is 0. if a mission is too long for a single ds1922l/ds1922t to store all readings at the selected sample rate, one can use several devices and set the mission start delay for the second device to start recording as soon as the memory of the first device is full, and so on. the ro bit in the mission control register (address 0213h) must be set to 0 to prevent overwriting of collected data once the data-log memory is full. mission timestamp the mission timestamp register indicates the date and time of the first temperature sample of the mission. there is only read access to the mission timestamp register. mission progress indicator depending on settings in the mission control register (address 0213h), the ds1922l/ds1922t log tempera- ture in 8-bit or 16-bit format. the mission samples counter together with the starting address and the log- ging format (8 or 16 bits) provide the information to iden- tify valid blocks of data that have been gathered during the current (mip = 1) or latest mission (mip = 0). see the data-log memory usage section for an illustration. the number read from the mission samples counterindicates how often the ds1922l/ds1922t woke up during a mission to measure temperature. the number format is 24-bit unsigned integer. the mission samples counter is reset through the clear memory command. mission start delay counter register bitmap address bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0216h delay low byte 0217h delay center byte 0218h delay high byte mission samples counter register bitmap address bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0220h low byte 0221h center byte 0222h high byte mission timestamp register bitmap address bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0219h 0 10 seconds single seconds 021ah 0 10 minutes single minutes 021bh 0 12/24 20 hours am/pm 10 hours single hours 021ch 0 0 10 date single date 021dh cent 0 0 10 months single months 021eh 10 years single years note: during a mission, there is only read access to this register. note: there is only read access to this register. note: there is only read access to this register. downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 25 www.maximintegrated.com other indicators the device samples counter register is similar to the mission samples counter register. during a mission this counter increments whenever the ds1922l/ds1922t wake up to measure and log data and when these devices are testing for a temperature alarm in suta mode. between missions, the counter increments when- ever the forced conversion command is executed. this way the device samples counter register functions like a gas gauge for the battery that powers the device. the device samples counter register is reset to zero when the device is assembled. the number format is 24-bit unsigned integer. the maximum number that can be represented in this format is 16,777,215. due to the calibration and tests at the factory, new devices can have a count value of up to 35,000. the typical value is well below 10,000. the code in the device configuration register allows the master to distinguish between the ds2422 chip and different versions of the ds1922 devices. the device configuration register bitmap shows the codes assigned to the various devices. security by password the ds1922l/ds1922t are designed to use two pass- words that control read access and full access. reading from or writing to the scratchpad as well as the forced conversion command does not require a pass- word. the password must be transmitted immediately after the command code of the memory or control func- tion. if password checking is enabled, the password transmitted is compared to the passwords stored in the device. the data pattern stored in the password control register determines whether password checking is enabled. to enable password checking, the epw bits need to form a binary pattern of 10101010 (aah). the default pattern of epw is different from aah. if the epw pattern is different from aah, any pattern is accepted as long as it has a length of exactly 64 bits. once enabled, changing the passwords and disabling password checking requires the knowledge of the current full- access password. device samples counter register bitmap address bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0223h low byte 0224h center byte 0225h high byte password control register bitmap address bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0227h epw device configuration register bitmap address bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 part 0 0 0 0 0 0 0 0 ds2422 0 0 1 0 0 0 0 0 ds1923 0 1 0 0 0 0 0 0 ds1922l 0 1 1 0 0 0 0 0 ds1922t 0226h 1 0 0 0 0 0 0 0 ds1922e note: there is only read access to this register. note: there is only read access to this register. note: during a mission, there is only read access to this register. downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 26 www.maximintegrated.com before enabling password checking, passwords forread-only access as well as for full access (read/write/control) must be written to the password registers. setting up a password or enabling/dis- abling the password checking is done in the same way as writing data to a memory location; only the address is different. since they are located in the same memory page, both passwords can be rede- fined at the same time. the read access password must be transmitted exact- ly in the sequence rp0, rp1?p62, rp63. this pass- word only applies to the read memory with crc function. the ds1922l/ds1922t deliver the requested data only if the password transmitted by the master was correct or if password checking is not enabled. the full-access password must be transmitted exactlyin the sequence fp0, fp1?p62, fp63. it affects the functions read memory with crc, copy scratchpad, clear memory, start mission, and stop mission. the ds1922l/ds1922t execute the command only if the password transmitted by the master was correct or if password checking is not enabled. due to the special behavior of the write-access logic, the password control register and both passwords must be written at the same time. when setting up new passwords, always verify (read back) the scratchpad before sending the copy scratchpad command. after a new password is successfully copied from the scratch- pad to its memory location, erase the scratchpad by fill- ing it with new data (write scratchpad command). otherwise, a copy of the passwords remains in the scratchpad for public read access. read access password register bitmap address bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0228h rp7 rp6 rp5 rp4 rp3 rp2 rp1 rp0 0229h rp15 rp14 rp13 rp12 rp11 rp10 rp9 rp8 022eh rp55 rp54 rp53 rp52 rp51 rp50 rp49 rp48 022fh rp63 rp62 rp61 rp60 rp59 rp58 rp57 rp56 full access password register bitmap address bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0230h fp7 fp6 fp5 fp4 fp3 fp2 fp1 fp0 0231h fp15 fp14 fp13 fp12 fp11 fp10 fp9 fp8 0236h fp55 fp54 fp53 fp52 fp51 fp50 fp49 fp48 0237h fp63 fp62 fp61 fp60 fp59 fp58 fp57 fp56 note: there is only write access to this register. attempting to read the password reports all zeros. the password cannot be changed while a mission is in progress. note: there is only write access to this register. attempting to read the password reports all zeros. the password cannot be changed while a mission is in progress. downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 27 www.maximintegrated.com data-log memory usage once set up for a mission, the ds1922l/ds1922t logthe temperature measurements at equidistant time points entry after entry in their data-log memory. the data-log memory can store 8192 entries in 8-bit format or 4096 entries in 16-bit format (figure 7). in 16-bit for- mat, the higher 8 bits of an entry are stored at the lower address. knowing the starting time point (mission timestamp) and the interval between temperature mea- surements, one can reconstruct the time and date of each measurement. there are two alternatives to the way the ds1922l/ ds1922t behave after the data-log memory is filled with data. the user can program the device to either stop any further recording (disable rollover) or overwrite the previously recorded data (enable rollover), one entry at a time, starting again at the beginning of the respective memory section. the contents of the mission samples counter in conjunction with the sample rate and the mission timestamp allow reconstructing the time points of all values stored in the data-log memory. this gives the exact history over time for the most recent measurements taken. earlier measurements cannot be reconstructed. missioning the typical task of the ds1922l/ds1922t is recordingtemperature. before the devices can perform this func- tion, they need to be set up properly. this procedure is called missioning. first, the ds1922l/ds1922t must have their rtc set to a valid time and date. this reference time can be the local time, or, when used inside of a mobile unit, utc (also called gmt, greenwich mean time), or any other time standard that was agreed upon. the rtc oscillator must be running (eosc = 1). the memory assigned to store the mission timestamp, mission samples counter, and alarm flags must be cleared using thememory clear command. to enable the device for a mission, the etl bit must be set to 1. these are general settings that must be made in any case, regardless of the type of object to be monitored and the duration of the mission. if alarm signaling is desired, the temperature alarm low and high thresholds must be defined. see the temperature conversion section for how to convert a temperature value into the binary code to be written tothe threshold registers. in addition, the temperature alarm must be enabled for the low and/or high thresh- old. this makes the device respond to a conditional search command (see the 1-wire rom function commands section), provided that an alarming condi- tion has been encountered.the setting of the ro bit (rollover enable) and sample rate depends on the duration of the mission and the monitoring requirements. if the most recently logged data is important, the rollover should be enabled (ro = 1). otherwise, one should estimate the duration of the mission in minutes and divide the number by 8192 (8-bit format) or 4096 (16-bit format) to calculate the value of the sample rate (number of minutes between conversions). for example, if the estimated duration of a mission is 10 days (= 14400min), the 8192-byte capacity of the data-log memory would be sufficient to store a new 8-bit value every 1.8min (110s). if the ds1922l/ds1922t? data-log memories are not large enough to store all readings, one can use several devices and set the mission start delay to values that make the second device start logging as soon as the memory of the first device is full, and so on. the ro bit must be set to 0 to disable rollover that would otherwise overwrite the logged data. after the ro bit and the mission start delay are set, the sample rate must be written to the sample rate regis- ter. the sample rate can be any value from 1 to 16,383, coded as an unsigned 14-bit binary number. the fastest sample rate is one sample per second (ehss = 1, sample rate = 0001h) and the slowest is one sample every 273.05hr (ehss = 0, sample rate = 3fffh). to get one sample every 6min, for example, the sample rate value must be set to 6 (ehss = 0) or 360 decimal (equivalent to 0168h at ehss = 1). if there is a risk of unauthorized access to the ds1922l/ ds1922t or manipulation of data, one should define passwords for read access and full access. before the passwords become effective, their use must be enabled. see the security by password section for more details. 8192 8-bit entries temperature 1000h etl = 1tlfs = 0 2fffh 4096 16-bit entries temperature with 16-bit format,the most significant byte is stored at the lower address. 1000h etl = 1tlfs = 1 2fffh figure 7. temperature logging downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 28 www.maximintegrated.com the last step to begin a mission is to issue the startmission command. as soon as they have received this command, the ds1922l/ds1922t set the mip flag and clear the memclr flag. with the immediate/delayed start mode (suta = 0), and after as many minutes as specified by the mission start delay are over, the device wakes up, copies the current date and time to the mission timestamp register, and logs the first entry of the mission. this increments both the mission samples counter and device samples counter. all subsequent log entries are made as specified by the value in the sample rate register and the ehss bit. if the start upon temperature alarm mode is chosen (suta = 1) and temperature logging is enabled (etl = 1), the ds1922l/ds1922t first wait until the start delay is over. then the device wakes up in intervals as speci- fied by the sample rate and ehss bit and measures the temperature. this increments the device samples counter register only. the first sample of the mission is logged when the temperature alarm occurred. however, the mission samples counter does not incre- ment. one sample period later the mission timestamp register is set. from then on, both the mission samples counter and device samples counter registers incre- ment at the same time. all subsequent log entries are made as specified by the value in the sample rate reg- ister and the ehss bit. the general-purpose memory operates independently of the other memory sections and is not write protected during a mission. all the ds1922l/ds1922t? memory can be read at any time, e.g., to watch the progress ofa mission. attempts to read the passwords read 00h bytes instead of the data that is stored in the password registers. memory access address registers and transfer status because of the serial data transfer, the ds1922l/ ds1922t employ three address registers called ta1, ta2, and e/s (figure 8). registers ta1 and ta2 must be loaded with the target address to which the data is written or from which data is sent to the master upon a read command. register e/s acts like a byte counter and transfer status register. it is used to verify data integrity with write commands. therefore, the master only has read access to this register. the lower 5 bits of the e/s register indicate the address of the last byte that has been written to the scratchpad. this address is called ending offset. the ds1922l/ds1922t require that the ending offset is always 1fh for a copyscratchpad command to function. bit 5 of the e/s register, called pf or partial byte flag, is set if the num-ber of data bits sent by the master is not an integer multiple of 8. bit 6 is always a 0. note that the lowest 5 bits of the target address also determine the address within the scratchpad, where intermediate storage of data begins. this address is called byte offset. if the target address for a write command is 13ch, for exam- ple, the scratchpad stores incoming data beginning at the byte offset 1ch and is full after only 4 bytes. the bit number 7 6 5 4 3 2 1 0 target address (ta1) t7 t6 t5 t4 t3 t2 t1 t0 target address (ta2) t15 t14 t13 t12 t11 t10 t9 t8 ending address with data status (e/s) (read only) aa 0 pf e4 e3 e2 e1 e0 figure 8. address registers downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 29 www.maximintegrated.com corresponding ending offset in this example is 1fh. forbest economy of speed and efficiency, the target address for writing should point to the beginning of a page, i.e., the byte offset is 0. thus, the full 32-byte capacity of the scratchpad is available, resulting also in the ending offset of 1fh. the ending offset together with the pf flag are a means to support the master checking the data integrity after a write command. the highest valued bit of the e/s register, called authorization accepted (aa), indicates that a valid copy command for the scratchpad has been received and executed. writing data to the scratchpad clears this flag. writing with verification to write data to the ds1922l/ds1922t, the scratchpad must be used as intermediate storage. first, the master issues the write scratchpad command to specify the desired target address, followed by the data to be writ- ten to the scratchpad. in the next step, the master sends the read scratchpad command to read the scratchpad and to verify data integrity. as preamble to the scratchpad data, the ds1922l/ds1922t send the requested target address ta1 and ta2 and the con- tents of the e/s register. if the pf flag is set, data did not arrive correctly in the scratchpad. the master does not need to continue reading; it can start a new trial to write data to the scratchpad. similarly, a set aa flag indicates that the write command was not recognized by the device. if everything went correctly, both flags are cleared and the ending offset indicates the address of the last byte written to the scratchpad. now the mas- ter can continue verifying every data bit. after the mas- ter has verified the data, it must send the copy scratchpad command. this command must be fol- lowed exactly by the data of the three address registers ta1, ta2, and e/s, as the master has read them verify- ing the scratchpad. as soon as the ds1922l/ds1922t have received these bytes, they copy the data to the requested location beginning at the target address. memory and control function commands figure 9 shows the protocols necessary for accessingthe memory and the special function registers of the ds1922l/ds1922t. an example on how to use these and other functions to set up the ds1922l/ds1922t for a mission is included in the mission example: prepare and start a new mission section. the communication between the master and the ds1922l/ds1922t takesplace either at standard speed (default, od = 0) or at overdrive speed (od = 1). if not explicitly set into the overdrive mode the ds1922l/ds1922t assume stan- dard speed. internal memory access during a mission has priority over external access through the 1-wire interface. this affects several commands in this sec- tion. see the memory access conflicts section for details and solutions. write scratchpad [0fh] after issuing the write scratchpad command, the mas- ter must first provide the 2-byte target address, fol- lowed by the data to be written to the scratchpad. the data is written to the scratchpad starting at the byte off- set t[4:0]. the master must send as many bytes as are needed to reach the ending offset of 1fh. if a data byte is incomplete, its content is ignored and the partial byte flag pf is set. when executing the write scratchpad command, the crc generator inside the ds1922l/ds1922t calculates a crc of the entire data stream, starting at the com- mand code and ending at the last data byte sent by the master (figure 15). this crc is generated using the crc-16 polynomial by first clearing the crc generator and then shifting in the command code (0fh) of the write scratchpad command, the target addresses ta1 and ta2 as supplied by the master, and all the data bytes. if the ending offset is 11111b, the master can send 16 read time slots and receive the inverted crc- 16 generated by the ds1922l/ds1922t. note that both register pages are write protected dur- ing a mission. although the write scratchpad command works normally at any time, the subsequent copy scratchpad to a register page fails during a mission. downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 30 www.maximintegrated.com read scratchpad [aah] this command is used to verify scratchpad data and target address. after issuing the read scratchpad command, the master begins reading. the first 2 bytes are the target address. the next byte is the ending off- set/data status byte (e/s) followed by the scratchpad data beginning at the byte offset t[4:0], as shown in figure 8. the master can continue reading data until the end of the scratchpad after which it receives an inverted crc-16 of the command code, target addresses ta1 and ta2, the e/s byte, and the scratch- pad data starting at the target address. after the crc is read, the bus master reads logic 1s from the ds1922l/ds1922t until a reset pulse is issued. copy scratchpad with password [99h] this command is used to copy data from the scratch- pad to the writable memory sections. after issuing the copy scratchpad command, the master must provide a 3-byte authorization pattern, which can be obtained by reading the scratchpad for verification. this pattern must exactly match the data contained in the three address registers (ta1, ta2, e/s, in that order). next, the master must transmit the 64-bit full-access pass- word. if passwords are enabled and the transmitted password is different from the stored full-access pass- word, the copy scratchpad with password command fails. the device stops communicating and waits for a reset pulse. if the password was correct or if pass- words were not enabled, the device tests the 3-byte authorization code. if the authorization code pattern matches, the aa flag is set and the copy begins. a pat- tern of alternating 1s and 0s is transmitted after the data has been copied until the master issues a reset pulse. while the copy is in progress, any attempt to reset the part is ignored. copy typically takes 2? per byte. the data to be copied is determined by the three address registers. the scratchpad data from the begin- ning offset through the ending offset are copied, start- ing at the target address. the aa flag remains at logic 1 until it is cleared by the next write scratchpad com- mand. with suitable password, the copy scratchpad always functions for the 16 pages of data memory and the 2 pages of calibration memory. while a mission is in progress, write attempts to the register pages are notsuccessful. the aa bit remaining at 0 indicates this. read memory with password and crc [69h] the read memory with crc command is the general function to read from the device. this command gener- ates and transmits a 16-bit crc following the last data byte of a memory page. after having sent the command code of the read memory with crc command, the bus master sends a 2-byte address that indicates a starting byte location. next, the master must transmit one of the 64-bit pass- words. if passwords are enabled and the transmitted password does not match one of the stored passwords, the read memory with password and crc command fails. the device stops communicating and waits for a reset pulse. if the password was correct or if pass- words were not enabled, the master reads data from the ds1922l/ds1922t beginning from the starting address and continuing until the end of a 32-byte page is reached. at that point the bus master sends 16 addi- tional read-data time slots and receives the inverted 16- bit crc. with subsequent read-data time slots the master receives data starting at the beginning of the next memory page followed again by the crc for that page. this sequence continues until the bus master resets the device. when trying to read the passwords or memory areas that are marked as ?eserved,?the ds1922l/ds1922t transmit 00h or ffh bytes, respec- tively. the crc at the end of a 32-byte memory page is based on the data as it was transmitted. with the initial pass through the read memory with crc flow, the 16-bit crc value is the result of shifting the command byte into the cleared crc generator followed by the two address bytes and the contents of the data memory. subsequent passes through the read memory with crc flow generate a 16-bit crc that is the result of clearing the crc generator and then shifting in the contents of the data memory page. after the 16-bit crc of the last page is read, the bus master receives logic 1s from the ds1922l/ds1922t until a reset pulse is issued. the read memory with crc command sequence can be ended at any point by issuing a reset pulse. downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 31 www.maximintegrated.com master tx memory or control function command master tx ta1 [t7:t0] master tx data byte to scratchpad offset ds1922 increments scratchpad offset ds1922 sets scratchpad offset = [t4:t0] and clears (pf, aa) 0fh write scratchpad? ny yn y n n y n master tx reset? scratchpad offset = 11111b? master tx reset? master tx reset? master tx ta2 [t15:t8] ds1922 sets [e4:e0] = scratchpad offset n from rom functions flowchart (figure 11) to rom functions flowchart (figure 11) y y to figure 9b from figure 9b master rx crc-16 of command, address data master rx "1"s partial byte written? pf = 1 aa = 1 master rx ta1 [t7:t0] ds1922 sets scratchpad offset = [t4:t0] ds1922 increments scratchpad offset master rx ending offset with data status (e/s) aah read scratchpad? ny yn y n y n master tx reset? scratchpad offset = 11111b? master tx reset? master rx ta2 [t15:t8] master rx data byte from scratchpad offset master rx crc-16 of command, address data, e/s byte, and data starting at the target address master rx "1"s 99h copy scratchpad [with pw] ny yn n master tx reset? master tx reset? copying finished master tx e/s byte master tx ta1 [t7:t0], ta2 [t15:t8] authorizationcode master tx 64 bits [password] ds1922 copies scratchpad data to memory n y authorization code match? n y n yy n master tx reset? y password accepted? ds1922 tx "0" ds1922 tx "1" master rx "1"s master rx "1"s figure 9a. memory/control function flowchart downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 32 www.maximintegrated.com from figure 9ato figure 9a to figure 9c from figure 9c 69h read memory [with pw] and crc nn y y n n end of memory? master tx reset? crc ok? master tx 64 bits [password] master tx ta1 [t7:t0], ta2 [t15:t8] ds1922 sets memory address = [t15:t0] master rx data byte from memory address y n n n end of page? decision made by master decision made by ds1922 y n yy master tx reset? y password accepted? master tx reset master rx "1"s master rx crc-16 of command, address, data (1st pass); crc-16 of data (subsequent passes) ds1922 increments address counter n y master tx ffh dummy byte master tx 64 bits [password] ds1922 sets memclr = 1 y mission in progress? n n y master tx reset? y password accepted? ds1922 clears mission timestamp, mission samples counter, alarm flags 96h clear memory [with pw] n n y master tx ffh dummy byte ds1922 copies result to address 020c/dh ds1922 performs a temperature conversion y mission in progress? n master tx reset? y 55h forced conversion? figure 9b. memory/control function flowchart (continued) downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 33 www.maximintegrated.com mission start delay process from figure 9bto figure 9b y start delay counter = 0? n n suta = 1? y n temperature alarm? y mip = 0? n n n y master tx ffh dummy byte master tx 64 bits [password] ds1922 waits for 1 minute ds1922 sets wfta = 1 ds1922 sets wfta = 0 ds1922 decrements start delay counter ds1922 waits one sample period ds1922 performs 8-bit temperature conversion ds1922 waits one sample period mission in progress? n y master tx reset? y password accepted? n y y memclr = 1? y n ds1922 sets mip = 1, memclr = 0 ds1922 copies rtc data to mission timestamp register ds1922 starts logging taking first sample ds1922 initiates mission start delay process cch start mission [with pw] n y master tx ffh dummy byte master tx 64 bits [password] mission in progress? y y master tx reset? y password accepted? ds1922 sets mip = 0, wfta = 0 33h stop mission [with pw] n nn end of process figure 9c. memory/control function flowchart (continued) downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 34 www.maximintegrated.com clear memory with password [96h] the clear memory with password command is used to prepare the device for another mission. this command is only executed if no mission is in progress. after the command code the master must transmit the 64-bit full- access password followed by an ffh dummy byte. if passwords are enabled and the transmitted password is different from the stored full-access password or a mission is in progress, the clear memory with password command fails. the device stops communicating and waits for a reset pulse. if the password was correct or if passwords were not enabled, the device clears the mission timestamp register, mission samples counter register, and all alarm flags of the alarm status register. after these cells are cleared, the memclr bit of the general status register reads 1 to indicate the success- ful execution of the clear memory with password com- mand. clearing of the data-log memory is not necessary because the mission samples counter indi- cates how many entries in the data-log memory are valid. forced conversion [55h] the forced conversion command can be used to mea- sure the temperature without starting a mission. after the command code, the master must send one ffh byte to get the conversion started. the conversion result is found as a 16-bit value in the latest temperature conversion result register. this command is only executed if no mission is in progress (mip = 0). it cannot be interrupted and takes maximum 600ms to complete. during this time memory access through the 1-wire interface is blocked. the device behaves the same way as during a mission when the sampling inter- feres with a memory/control function command. see the memory access conflicts section for details. start mission with password [cch] the ds1922l/ds1922t use a control function com- mand to start a mission. a new mission can only be started if the previous mission has been ended and the memory has been cleared. after the command code, the master must transmit the 64-bit full-access pass- word followed by an ffh dummy byte. if passwords are enabled and the transmitted password is different from the stored full-access password or a mission is in progress, the start mission with password command fails. the device stops communicating and waits for a reset pulse. if the password was correct or if pass- words were not enabled, the device starts a mission. if suta = 0, the sampling begins as soon as the mission start delay is over. if suta = 1, the first sample is writ- ten to the data-log memory at the time the temperature alarm occurred. however, the mission samples counter does not increment. one sample period later, the mission timestamp register is set and the regular sam-pling and logging begins. while the device is waiting for a temperature alarm to occur, the wfta flag in the general status register reads 1. during a mission there is only read access to the register pages. stop mission with password [33h] the ds1922l/ds1922t use a control function com- mand to stop a mission. only a mission that is in progress can be stopped. after the command code, the master must transmit the 64-bit full-access pass- word followed by a ffh dummy byte. if passwords are enabled and the transmitted password is different from the stored full-access password or a mission is not in progress, the stop mission with password command fails. the device stops communicating and waits for a reset pulse. if the password was correct or if pass- words were not enabled, the device clears the mip bit in the general status register and restores write access to the register pages. the wfta bit is not cleared. see the description of the general status register for a method to clear the wfta bit. downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 35 www.maximintegrated.com memory access conflicts while a mission is in progress or while the device iswaiting for a temperature alarm to start a mission, peri- odically a temperature sample is taken and logged. this ?nternal activity?has priority over 1-wire communi- cation. as a consequence, device-specific commands (excluding rom function commands and 1-wire reset) do not perform properly when internal and ?xternal activities interfere with each other. not affected are the start mission, forced conversion, and clear memory commands, because they are not applicable while a mission is in progress or while the device is waiting fora temperature alarm. table 3 explains how the remain- ing five commands are affected by internal activity, how to detect this interference, and how to work around it. the interference is more likely to be seen with a high- sample rate (one sample every second) and with high- resolution logging, which can last up to 600ms. with lower sample rates, interference may hardly be visible at all. in any case, when writing driver software it is important to know about the possibility of interference and to take measures to work around it. table 3. memory access conflicts and solutions command indication of interference solution write scratchpad the crc-16 at the end of the command flow reads ffffh. wait 0.5s, 1-wire reset, address the device, repeat write scratchpad with the same data, and check the validity of the crc-16 at the end of the command flow. alternatively, use read scratchpad to verify data integrity. read scratchpad the data read changes to ffh bytes or all bytes received are ffh, including the crc at the end of the command flow. wait 0.5s, 1-wire reset, address the device, repeat read scratchpad, and check the validity of the crc-16 at the end of the command flow. copy scratchpad the device behaves as if the authorization code or password was not valid or as if the copy function would not end. wait 0.5s, 1-wire reset, address the device, issue read scratchpad, and check the aa bit of the e/s byte. if the aa bit is set, copy scratchpad was successful. read memory with crc the data read changes to all ffh bytes or all bytes received are ffh, including the crc at the end of the command flow, despite a valid password. wait 0.5s, 1-wire reset, address the device, repeat read memory with crc, and check the validity of the crc-16 at the end of the memory page. stop mission the general status register at address 0215h reads ffh or the mip bit is 1 while bits 0, 2, and 5 are 0. wait 0.5s, 1-wire reset, address the device, and repeat stop mission. perform a 1-wire reset, address the device, read the general status register at address 0215h, and check the mip bit. if the mip bit is 0, stop mission was successful. downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 36 www.maximintegrated.com 1-wire bus system the 1-wire bus is a system that has a single bus masterand one or more slaves. in all instances the ds1922l/ds1922t are slave devices. the bus master is typically a microcontroller. the discussion of this bus system is broken down into three topics: hardware con- figuration, transaction sequence, and 1-wire signaling (signal types and timing). the 1-wire protocol defines bus transactions in terms of the bus state during specif- ic time slots that are initiated on the falling edge of sync pulses from the bus master. hardware configuration the 1-wire bus has only a single line by definition; it isimportant that each device on the bus be able to drive it at the appropriate time. to facilitate this, each device attached to the 1-wire bus must have open-drain or three-state outputs. the 1-wire port of the ds1922l/ ds1922t is open drain with an internal circuit equiva- lent to that shown in figure 10. a multidrop bus consists of a 1-wire bus with multiple slaves attached. at standard speed the 1-wire bus has a maximum data rate of 16.3kbps. the speed can be boosted to 142kbps by activating the overdrive mode. the ds1922l/ds1922t are not guaranteed to be fully compliant to the ibutton device standard. their maximum data rate in standard speed is 15.4kbps and 125kbps in overdrive speed. the value of the pullup resistor primarily depends on the networksize and load conditions. the ds1922l/ds1922t require a pullup resistor of maximum 2.2k at any speed.the idle state for the 1-wire bus is high. if for any rea- son a transaction needs to be suspended, the bus must be left in the idle state if the transaction is to resume. if this does not occur and the bus is left low formore than 16? (overdrive speed) or more than 120? (standard speed), one or more devices on the bus may be reset. note that the ds1922l/ds1922t do not quite meet the full 16? maximum low time of the normal 1-wire bus overdrive timing. with the ds1922l/ ds1922t, the bus must be left low for no longer than 12? at overdrive to ensure that no ds1922l/ds1922t on the 1-wire bus performs a reset. the ds1922l/ ds1922t communicate properly when used in conjunc- tion with a ds2480b or ds2490 1-wire driver and adapters that are based on these driver chips. transaction sequence the protocol for accessing the ds1922l/ds1922tthrough the 1-wire port is as follows: ? initialization ? rom function command ? memory/control function command ? transaction/data rx r pup i l v pup bus master open-drain port pin 100 mosfet tx rxtx data ds1922l/ds1922t 1-wire port rx = receive tx = transmit figure 10. hardware configuration downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 37 www.maximintegrated.com initialization all transactions on the 1-wire bus begin with an initializa-tion sequence. the initialization sequence consists of a reset pulse transmitted by the bus master followed by presence pulse(s) transmitted by the slave(s). the pres- ence pulse lets the bus master know that the ds1922l/ds1922t are on the bus and are ready to oper- ate. for more details, see the 1-wire signaling section. 1-wire rom function commands once the bus master has detected a presence, it canissue one of the eight rom function commands that ds1922l/ds1922t support. all rom function com- mands are 8 bits long. a list of these commands follows (see the flowchart in figure 11). read rom [33h] this command allows the bus master to read the ds1922l/ds1922t? 8-bit family code, unique 48-bit serial number, and 8-bit crc. this command can only be used if there is a single slave on the bus. if more than one slave is present on the bus, a data collision occurs when all slaves try to transmit at the same time (open drain produces a wired-and result). the resul- tant family code and 48-bit serial number results in a mismatch of the crc. match rom [55h] the match rom command, followed by a 64-bit rom sequence, allows the bus master to address a specific ds1922l/ds1922t on a multidrop bus. only the ds1922l/ds1922t that exactly matches the 64-bit rom sequence responds to the following memory func- tion command. all other slaves wait for a reset pulse. this command can be used with a single device or multiple devices on the bus. search rom [f0h] when a system is initially brought up, the bus master might not know the number of devices on the 1-wire bus or their registration numbers. by taking advantage of the wired-and property of the bus, the master can use a process of elimination to identify the registrationnumbers of all slave devices. for each bit of the regis- tration number, starting with the least significant bit, the bus master issues a triplet of time slots. on the first slot, each slave device participating in the search outputs the true value of its registration number bit. on the sec- ond slot, each slave device participating in the search outputs the complemented value of its registration num- ber bit. on the third slot, the master writes the true value of the bit to be selected. all slave devices that do not match the bit written by the master stop participat- ing in the search. if both of the read bits are zero, the master knows that slave devices exist with both states of the bit. by choosing which state to write, the bus master branches in the rom code tree. after one com- plete pass, the bus master knows the registration num- ber of a single device. additional passes identify the registration numbers of the remaining devices. refer to application note 187: 1-wire search algorithm for a detailed discussion, including an example. conditional search rom [ech] the conditional search rom command operates simi- larly to the search rom command except that only those devices that fulfill certain conditions participate in the search. this function provides an efficient means for the bus master to identify devices on a multidrop system that have to signal an important event. after each pass of the conditional search that successfully determined the 64-bit rom code for a specific device on the multidrop bus, that particular device can be indi- vidually accessed as if a match rom had been issued, since all other devices have dropped out of the search process and are waiting for a reset pulse. the ds1922l/ds1922t respond to the conditional search rom command if one of the three alarm flags of the alarm status register (address 0214h) reads 1. the temperature alarm only occurs if enabled (see the temperature sensor alarm section). the bor alarm is always enabled. the first alarm that occurs makes the device respond to theconditional search rom command. downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 38 www.maximintegrated.com skip rom [cch] this command can save time in a single-drop bus sys- tem by allowing the bus master to access the memory functions without providing the 64-bit rom code. for example, if more than one slave is present on the bus and a read command is issued following the skip rom command, data collision occurs on the bus as multiple slaves transmit simultaneously (open-drain pulldowns produce a wired-and result). resume [a5h] the ds1922l/ds1922t must be accessed several times before a mission starts. in a multidrop environment this means that the 64-bit rom code after a match rom command must be repeated for every access. to maxi- mize the data throughput in a multidrop environment, the resume command was implemented. this com- mand checks the status of the rc bit and, if it is set, directly transfers control to the memory/control func- tions, similar to a skip rom command. the only way to set the rc bit is through successfully executing the match rom, search rom, or overdrive-match rom command. once the rc bit is set, the device can repeatedly be accessed through the resume command function. accessing another device on the bus clears the rc bit, preventing two or more devices from simulta- neously responding to the resume command. overdrive-skip rom [3ch] on a single-drop bus this command can save time by allowing the bus master to access the memory/control functions without providing the 64-bit rom code. unlike the normal skip rom command, the overdrive-skip rom command sets the ds1922l/ds1922t in the over-drive mode (od = 1). all communication following this command must occur at overdrive speed until a reset pulse of minimum 690? duration resets all devices on the bus to standard speed (od = 0). when issued on a multidrop bus, this command sets all overdrive-supporting devices into overdrive mode. to subsequently address a specific overdrive-supporting device, a reset pulse at overdrive speed must be issued followed by a match rom or search rom com- mand sequence. this speeds up the time for the search process. if more than one slave supporting overdrive is present on the bus and the overdrive-skip rom command is followed by a read command, data collision occurs on the bus as multiple slaves transmit simultaneously (open-drain pulldowns produce a wired- and result). overdrive-match rom [69h] the overdrive-match rom command followed by a 64-bit rom sequence transmitted at overdrive speed allows the bus master to address a specific ds1922l/ ds1922t on a multidrop bus and to simultaneously set it in overdrive mode. only the ds1922l/ds1922t that exactly matches the 64-bit rom sequence respond to the subsequent memory/control function command. slaves already in overdrive mode from a previous overdrive-skip rom or successful overdrive-match rom command remain in overdrive mode. all over- drive-capable slaves return to standard speed at the next reset pulse of minimum 690? duration. the overdrive-match rom command can be used with a single or multiple devices on the bus. downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 39 www.maximintegrated.com ds1922 tx presence pulse bus master tx reset pulse bus master tx rom function command ds1922 tx crc byte ds1922 tx family code (1 byte) ds1922 tx serial number (6 bytes) od = 0 rc = 0 master tx bit 0 rc = 0 rc = 0 rc = 0 y od reset pulse? y yy y y y n 33h read rom command? n 55h match rom command? bit 0 match? bit 0 match? n n n n n n n f0h search rom command? n ech conditional search command? n y rc = 1 master tx bit 1 master tx bit 63 bit 1 match? bit 63 match? y y rc = 1 from memory/control function flowchart (figure 9) ds1922 tx bit 0 ds1922 tx bit 0 master tx bit 0 bit 1 match? bit 63 match? ds1922 tx bit 1 ds1922 tx bit 1 master tx bit 1 ds1922 tx bit 63 ds1922 tx bit 63 master tx bit 63 y bit 0 match? n n n y y rc = 1 ds1922 tx bit 0 ds1922 tx bit 0 master tx bit 0 condition met? n y bit 1 match? bit 63 match? ds1922 tx bit 1 ds1922 tx bit 1 master tx bit 1 ds1922 tx bit 63 ds1922 tx bit 63 master tx bit 63 y from figure 11b to figure 11bto figure 11b from figure 11b to memory/control function flowchart (figure 9) figure 11a. rom functions flowchart downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 40 www.maximintegrated.com master tx bit 0 rc = 0; od = 1 rc = 0; od = 1 od = 0 (see note) note: the od flag remains at 1 if the device was already at overdrive speed before the overdrive-match rom command was issued. (see note)(see note) rc = 1? y n y a5h resume command? n y 3ch overdrive- skip rom? n rc = 0 y cch skip rom command? y 69h overdrive- match rom? n n od = 0 n od = 0 n master tx bit 1 master tx bit 63 y y rc = 1 y bit 0 match? master tx reset? bit 63 match? bit 1 match? n y n y master tx reset? n to figure 11afrom figure 11a from figure 11a to figure 11a figure 11b. rom functions flowchart (continued) downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 41 www.maximintegrated.com wire signaling the ds1922l/ds1922t require strict protocols to ensuredata integrity. the protocol consists of four types of sig- naling on one line: reset sequence with reset pulse and presence pulse, write-zero, write-one, and read-data. except for the presence pulse, the bus master initiates all these signals. the ds1922l/ds1922t can communi- cate at two different speeds: standard speed and over- drive speed. if not explicitly set into the overdrive mode, the ds1922l/ds1922t communicate at standard speed. while in overdrive mode the fast timing applies to all waveforms. to get from idle to active, the voltage on the 1-wire line needs to fall from v pup below the threshold v tl . to get from active to idle, the voltage needs to rise from v ilmax past the threshold v th . the time it takes for the voltage to make this rise is seen in figure 12 as ?and its duration depends on the pullup resistor (r pup ) used and the capacitance of the 1-wire network attached.the voltage v ilmax is relevant for the ds1922l/ ds1922t when determining a logical level, not trigger-ing any events. the initialization sequence required to begin any com- munication with the ds1922l/ds1922t is shown in figure 12. a reset pulse followed by a presence pulse indicates the ds1922l/ds1922t are ready to receive data, given the correct rom and memory function com- mand. if the bus master uses slew-rate control on the falling edge, it must pull down the line for t rstl + t f to compensate for the edge. a t rstl duration of 690? or longer exits the overdrive mode, returning the device tostandard speed. if the ds1922l/ds1922t are in over- drive mode and t rstl is no longer than 80?, the device remains in overdrive mode.after the bus master has released the line, it goes into receive mode (rx). now the 1-wire bus is pulled to v pup through the pullup resistor or, in the case of a ds2480b driver, through active circuitry. when thethreshold v th is crossed, the ds1922l/ds1922t wait for t pdh and then transmit a presence pulse by pulling the line low for t pdl . to detect a presence pulse, the master must test the logical state of the 1-wire line att msp . the t rsth window must be at least the sum of t pdhmax , t pdlmax , and t recmin . immediately after t rsth is expired, the ds1922l/ds1922t are ready for data com-munication. in a mixed population network, t rsth should be extended to minimum 480? at standardspeed and 48? at overdrive speed to accommodate other 1-wire devices. read/write time slots data communication with the ds1922l/ds1922t takes place in time slots that carry a single bit each. write time slots transport data from bus master to slave. read time slots transfer data from slave to master. the definitions of the write and read time slots are illustrated in figure 13. all communication begins with the master pulling the data line low. as the voltage on the 1-wire line falls below the threshold v tl , the ds1922l/ds1922t start their internal timing generator that determines when thedata line is sampled during a write time slot and how long data is valid during a read time slot. resistor master ds1922l/ds1922t t rstl t pdl t rsth t pdh master tx "reset pulse" master rx "presence pulse" v pup v ihmaster v th v tl v ilmax 0v t f t rec t msp figure 12. initialization procedure: reset and presence pulse downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 42 www.maximintegrated.com master-to-slave for a write-one time slot, the voltage on the data line must have crossed the v th threshold before the write- one low time t w1lmax is expired. for a write-zero time slot, the voltage on the data line must stay below the v th threshold until the write-zero low time t w0lmin is expired. the voltage on the data line should not exceed v ilmax during the entire t w0l or t w1l window. after the v th threshold has been crossed, the ds1922l/ds1922tneed a recovery time t rec before they are ready for the next time slot. slave-to-master a read-data time slot begins like a write-one time slot. the voltage on the data line must remain below v tl until the read low time t rl is expired. during the t rl window, when responding with a 0, the ds1922l/ds1922t start pulling the data line low; their internal timing generator determines when this pulldown ends and the voltage starts rising again. when responding with a 1, the ds1922l/ds1922t do not hold the data line low at all, and the voltage starts rising as soon as t rl is over. the sum of t rl + (rise time) on one side and the inter- nal timing generator of the ds1922l/ds1922t on theother side define the master sampling window (t msrmin to t msrmax ) in which the master must perform a read from the data line. for most reliable communication, t rl should be as short as permissible and the mastershould read close to but no later than t msrmax . after reading from the data line, the master must wait untilt slot is expired. this guarantees sufficient recovery time t rec for the ds1922l/ds1922t to get ready for the next time slot. improved network behavior (switchpoint hysteresis) in a 1-wire environment line termination is possibleonly during transients controlled by the bus master (1-wire driver). 1-wire networks, therefore, are suscep- tible to noise of various origins. depending on the physical size and topology of the network, reflections from end points and branch points can add up or can- cel each other to some extent. such reflections are vis- ible as glitches or ringing on the 1-wire communication line. noise coupled onto the 1-wire line from externalsources can also result in signal glitching. a glitch dur- ing the rising edge of a time slot can cause a slave device to lose synchronization with the master and, as a consequence, result in a search rom command coming to a dead end or cause a device-specific func- tion command to abort. for better performance in net- work applications, the ds1922l/ds1922t use a new 1-wire front-end, which makes them less sensitive to noise and also reduces the magnitude of noise inject- ed by the slave device itself. the ds1922l/ds1922t? 1-wire front-end differs from traditional slave devices in four characteristics: 1) the falling edge of the presence pulse has a con- trolled slew rate. this provides a better match to theline impedance than a digitally switched transistor, converting the high-frequency ringing known from traditional devices into a smoother low-bandwidth transition. the slew-rate control is specified by the parameter t fpd , which has different values for stan- dard and overdrive speed. 2) there is additional lowpass filtering in the circuit that detects the falling edge at the beginning of a timeslot. this reduces the sensitivity to high-frequency noise. this additional filtering does not apply at overdrive speed. 3) there is a hysteresis at the low-to-high switching threshold v th . if a negative glitch crosses v th but does not go below v th - v hy , it is not recognized (figure 14, case a). the hysteresis is effective atany 1-wire speed. 4) there is a time window specified by the rising edge hold-off time t reh during which glitches are ignored, even if they extend below v th - v hy threshold (figure 14, case b, t gl < t reh ). deep voltage droops or glitches that appear late after crossing thev th threshold and extend beyond the t reh window cannot be filtered out and are taken as the begin-ning of a new time sl ot (figure 14, case c, t gl t reh ). devices that have the parameters t fpd , v hy , and t reh specified in their electrical characteristics use theimproved 1-wire front-end. downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 43 www.maximintegrated.com resistor master resistor master resistor master ds1922l/ds1922t v pup v ihmaster v th v tl v ilmax 0v t f v pup v ihmaster v th v tl v ilmax 0v t f v pup v ihmaster v th v tl v ilmax 0v t f t slot t w1l t rec t slot t slot t w0l t rec master sampling window t rl t msr write-one time slotwrite-zero time slot read-data time slot figure 13. read/write timing diagrams downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 44 www.maximintegrated.com v pup v th v hy 0v t reh t gl t reh t gl case a case c case b figure 14. noise suppression scheme 1st stage 2nd stage 3rd stage 4th stage 7th stage 8th stage 6th stage 5th stage x 0 x 1 x 2 x 3 x 4 polynomial = x 16 + x 15 + x 2 + 1 input data crc output x 5 x 6 11th stage 12th stage 15th stage 14th stage 13th stage x 11 x 12 9th stage 10th stage x 9 x 10 x 13 x 14 x 7 16th stage x 16 x 15 x 8 figure 15. crc-16 hardware description and polynomial crc generation the ds1922l/ds1922t use two types of crcs. onecrc is an 8-bit type and is stored in the most signifi- cant byte of the 64-bit rom. the bus master can com- pute a crc value from the first 56 bits of the 64-bit rom and compare it to the value stored within the ds1922l/ds1922t to determine if the rom data has been received error-free. the equivalent polynomial function of this crc is x 8 + x 5 + x 4 + 1. this 8-bit crc is received in the true (noninverted) form, and it is com-puted at the factory and lasered into the rom. the other crc is a 16-bit type, generated according to the standardized crc-16 polynomial function x 16 + x 15 + x 2 + 1. this crc is used for error detection when reading register pages or the data-log memory usingthe read memory with crc command and for fast veri- fication of a data transfer when writing to or reading from the scratchpad. in contrast to the 8-bit crc, the 16-bit crc is always communicated in the invertedform. a crc generator inside the ds1922l/ds1922t (figure 15) calculates a new 16-bit crc as shown in the command flowchart of figure 9. the bus master compares the crc value read from the device to the one it calculates from the data and decides whether to continue with an operation or to reread the portion of the data with the crc error. with the initial pass through the read memory with crc flowchart, the 16- bit crc value is the result of shifting the command byte into the cleared crc generator, followed by the two address bytes and the data bytes. the password is excluded from the crc calculation. subsequent pass- es through the read memory with crc flowchart gen- erate a 16-bit crc that is the result of clearing the crc generator and then shifting in the data bytes. with the write scratchpad command, the crc is gener- ated by first clearing the crc generator and then shift- downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 45 www.maximintegrated.com ing in the command code, the target addresses ta1and ta2, and all the data bytes. the ds1922l/ds1922t transmit this crc only if the data bytes written to the scratchpad include scratchpad ending offset 11111b. the data can start at any location within the scratchpad. with the read scratchpad command, the crc is gen- erated by first clearing the crc generator and then shifting in the command code, the target addressesta1 and ta2, the e/s byte, and the scratchpad data starting at the target address. the ds1922l/ds1922t transmit this crc only if the reading continues through the end of the scratchpad, regardless of the actual ending offset. for more information on generating crc values, refer to application note 27. command-specific 1-wire communication protocollegend symbol description rst 1-wire reset pulse generated by master. pd 1-wire presence pulse generated by slave. select command and data to satisfy the rom function protocol. ws command write scratchpad. rs command read scratchpad. cps command copy scratchpad with password. rmc command read memory with password and crc. cm command clear memory with password. fc command forced conversion. sm command start mission with password. stp command stop mission with password. ta target address ta1, ta2. ta-e/s target address ta1, ta2 with e/s byte. transfer of as many data bytes as are needed to reach the s cratchpad offset 1fh. transfer of as many data bytes as are needed to reach the en d of a memory page. transfer of as many data bytes as are needed to reach the end of the data-log memory. transfer of 8 bytes that either represent a valid password or acceptable dummy data. <32 bytes> transfer of 32 bytes. transfer of an undetermined amount of data. ffh transmission of one ffh byte. cc-16 transfer of an inverted crc-16. ff loop indefinite loop where the master reads ff bytes. aa loop indefinite loop where the master reads aa bytes. busy interval during copy scratchpad where the ds1922l/t does not respond. any bit s read during this time are logic 1. downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 46 www.maximintegrated.com rst write scratchpad, reaching the end of the scratchpad (cannot fail) pd ws ta select crc-16 ff loop crc-16 ff loop crc-16 rst read scratchpad (cannot fail) pd rs ta-e/s select busy aa loop rst copy scratchpad with password (success) pd cps ta-e/s select ff loop ff loop loop rst copy scratchpad with password (fail ta-e/s or password) pd cps ta-e/s select ff loop ff loop rst read memory with password and crc (fail password or address) pd rmc ffh select rst ta ta read memory with password and crc (success) pd rmc select rst cm clear memory with password pd select crc-16 <32 bytes> to verify success, read the general status register at address 0215h. if memclr is 1, the command was executed successfully. command-specific 1-wire communication protocolcolor codes master-to-slave slave-to-master 1-wire communication examples downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 47 www.maximintegrated.com mission example: prepare and start a new mission assumption: the previous mission has been ended byusing the stop mission command. passwords are not enabled. the device is a ds1922l. starting a mission requires three steps: step 1: clear the data of the previous mission.step 2: write the setup data to register page 1. step 3: start the new mission. step 1: clear the data of the previous mission. with only a single device connected to the bus master, the communication of step 1 looks like this: rst forced conversion pd fc select ff loop ffh to read the result and to verify success, read the addresses 020ch to 020fh (results) and the device samplescounter at address 0223h to 0225h. if the count has incremented, the command was executed successfully. ff loop rst start mission with password pd sm select ffh to verify success, read the general status register at address 0215h. if mip is 1 and memclr is 0, the commandwas executed successfully. rst stop mission with password pd stp select ff loop ffh to verify success, read the general status register at address 0215h. if mip is 0, the command was executedsuccessfully. 1-wire communication examples (continued) master mode data (lsb first) comments tx (reset) reset pulse rx (presence) presence pulse tx cch issue skip rom command tx 96h issue clear memory command tx <8 ffh bytes> send dummy password tx ffh send dummy byte tx (reset) reset pulse rx (presence) presence pulse downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 48 www.maximintegrated.com step 2: write the setup data to register page 1.during the setup, the device needs to learn the follow- ing information: ? time and date ? sample rate ? alarm thresholds ? alarm controls (response to conditional search) general mission parameters (e.g., channels to log and logging format, rollover, start mode) ? mission start delaythe following data sets up the ds1922l for a mission that logs temperature using 8-bit format. address data example values function 0200h 00h 0201h 30h 0202h 15h 15:30:00 hours time 0203h 01h 0204h 04h 0205h 02h 1st of april in 2002 date 0206h 0ah 0207h 00h every 10 minutes (ehss = 0) sample rate 0208h 52h 0209h 66h 0c low 10c high temperature alarm thresholds 020ah 00h 020bh ffh (dont care) (not applicable with ds1922l/ds1922t) 020ch ffh 020dh ffh 020eh ffh 020fh ffh (dont care) clock through read-only registers 0210h 02h enable high alarm temperature alarm control 0211h fch disabled (not applicable with ds1922l/ds1922t) 0212h 01h on (enabled), ehss = 0 (low sample rate) rtc oscillator contr ol, sample rate selection 0213h c1h normal start; no rollover; 8-bit temperature log general mission control 0214h ffh 0215h ffh (dont care) clock through read-only registers 0216h 5ah 0217h 00h 0218h 00h 90 minutes mission start delay downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 49 www.maximintegrated.com with only a single device connected to the bus master,the communication of step 2 looks like this: master mode data (lsb first) comments tx (reset) reset pulse rx (presence) presence pulse tx cch issue skip rom command tx 0fh issue write scratchpad command tx 00h ta1, beginning offset = 00h tx 02h ta2, address = 02 00h tx <25 data bytes> write 25 bytes of data to scratchpad tx <7 ffh bytes> write through the end of the scratchpad tx (reset) reset pulse rx (presence) presence pulse tx cch issue skip rom command tx aah issue read scratchpad command rx 00h read ta1, beginning offset = 00h rx 02h read ta2, address = 02 00h rx 1fh read e/s, ending offset = 1fh, flags = 0h rx <32 data bytes> read scratchpad data and verify tx (reset) reset pulse rx (presence) presence pulse tx cch issue skip rom command tx 99h issue copy scratchpad command tx 00h ta1 tx 02h ta2 tx 1fh e/s (authorization code) tx <8 ffh bytes> send dummy password tx (reset) reset pulse rx (presence) presence pulse master mode data (lsb first) comments tx (reset) reset pulse rx (presence) presence pulse tx cch issue skip rom command tx cch issue start mission command tx <8 ffh bytes> send dummy password tx ffh send dummy byte tx (reset) reset pulse rx (presence) presence pulse step 3: start the new mission.with only a single device connected to the bus master, the communication of step 3 looks like this: if step 3 was successful, the mip bit in the generalstatus register is 1, the memclr bit is 0, and the mission start delay counts down. downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 50 www.maximintegrated.com software correction algorithm for temperature the accuracy of high-resolution temperature conver-sion results (forced conversion as well as temperature logs) can be improved through a correction algorithm. the data needed for this software correction is stored in the calibration memory (memory page 18, duplicated in page 19). this data consists of reference tempera- ture (t r ) and conversion result (t c ) for two different tem- peratures. see the temperature conversion section for the binary number format.the software correction algorithm requires two addi- tional values, which are not stored in the device. these values, tr1 and offset, are derived from the device configuration byte. the correction algorithm consists of two steps: prepa-ration and execution. by means of the family code the preparation step verifies whether the device actually is a ds1922. then the configuration byte is checked to identify the type of ds1922 (l or t). if it is the correct device, the data for software correction is read and converted from binary to decimal ? format. next, three coefficients a, b, and c are computed. in the execution step, the temperature reading as delivered by the ds1922 is first converted from the low- byte/high-byte format (tcl, tch) to ? (t c ) and then corrected to t corr . once step 1 is performed, the three coefficients can be used repeatedly to correctany temperature reading and temperature log of the same device . address designator description 0240h tr2h cold-reference temperature, high byte 0241h tr2l cold-reference temperature, low byte 0242h tc2h conversion result at cold-reference temperature, high byte 0243h tc2l conversion result at cold-reference temperature, low byte 0244h tr3h hot-reference temperature, high byte 0245h tr3l hot-reference temperature, low byte 0246h tc3h conversion result at hot-reference temperature, high byte 0247h tc3l conversion result at hot-reference temperature, low byte step 1. preparationread the 64-bit rom to obtain the family code. if family code 41h, then stop (wrong device). read the configuration byte at address 0226h.if code = 40h, then tr1 = 60, offset = 41 (ds1922l) if code = 60h, then tr1 = 90, offset = 1 (ds1922t) for all other codes, stop (wrong device). tr2 = tr2h/2 + tr2l/512 - offset (convert from binary to ?) tr3 = tr3h/2 + tr3l/512 - offset (convert from binary to ?) tc2 = tc2h/2 + tc2l/512 - offset (convert from binary to ?) tc3 = tc3h/2 + tc3l/512 - offset (convert from binary to ?) err2 = tc2 - tr2 err3 = tc3 - tr3 err1 = err2 b = (tr2 2 - tr1 2 ) x (err3 - err1)/[(tr2 2 - tr1 2 ) x (tr3 - tr1) + (tr3 2 - tr1 2 ) x (tr1 - tr2)] a = b x (tr1 - tr2) / (tr2 2 - tr1 2 ) c = err1 - a x tr1 2 - b x tr1 step 2. executiont c = tch/2 + tcl/512 - offset (convert from binary to ?) t corr = tc - (a x tc 2 + b x tc + c) (the actual correction) downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated | 51 www.maximintegrated.com numerical correction example converted data from calibration memory error values tr1 = 60c tr2 = -10.1297c err2 = 0.0672c tr3 = 24.6483c err3 = -0.1483c tc2 = -10.0625c err1 = 0.0672c tc3 = 24.5c resulting correction coefficients application of correction coefficients to sample reading b = -0.008741 a = 0.000175/c t c = 22.500c c = -0.039332c t corr = 22.647c note: the software correction requires floating-point arithmetic (24 bit or better). suitable math libraries for microcontrollers are found on various websites and are included in cross compilers. a1 41 000000fbc52b 0 0 0 0 0 0 f b c 5 2 b 1-wire ? i b u t t o n ? . c o m y y w w z z z d s 1 9 2 2 l # f 5 0 16.25mm 5.89mm 0.51mm 17.35mm branding f5 size gnd io thermochron ? pin configuration thermochron is a registered trademark of maxim integrated products, inc. package type package code outline no. land pattern no. f5 can ib#6cb 21-0266 package information for the latest package outline information and land patterns (foot-prints), go to www.maximintegrated.com/packages . note that a ?? ?? or ??in the package code indicates rohs status only.package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. common ibutton device features ? rugged chip-based data carrier with fast, simple access to information ? digital identification and information by momentary contact ? unique factory-lasered 64-bit registration number ensures error-free device selection and absolute traceability because no two parts are alike ? built-in multidrop controller for 1-wire net ? chip-based data carrier compactly stores information ? data can be accessed while affixed to an object ? button shape is self-aligning with cup-shaped probes ? durable stainless-steel case engraved with registration number withstands harsh environments ? easily affixed with self-stick adhesive backing, latched by its flange, or locked with a ring pressed onto its rim ? presence detector acknowledges when reader first applies voltage downloaded from: http:///
ds1922l/ds1922t ibutton temperature loggers with 8kb datalog memory maxim integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim integrated product. no circuit patent licenses are implied. maxim integrated reserves the right to change the circuitry and specifications without notice at any time. the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidance. maxim integrated and the maxim integrated logo are trademarks of maxim integrated products, inc. 2015 maxim integrated products, inc. | 52 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim integrateds website at www.maximintegrated.com. revision history revision number revision date description pages changed 7 12/07 added bullet water resistant or waterproof if placed inside ds910 7 ibutton capsule (exceeds water resistant 3 atm requirements); deleted application pe nding from ul bullet and safety statement; added text to application section: note that the initial sealing level of ds1922l/ds1922t achieves ip56. aging and use con ditions can degrade the integrity of the seal over time, so for applications with si gnificant exposure to liquids, sprays, or other similar environments, it is recommended to place the thermochron in the ds9107 ibutton capsule. the ds9107 provides a waterti ght enclosure that has been rated to ip68 (see www.maximintegrated.com/an4126 ) 1, 4, 12 8 4/09 created newer template-styled data sheet all 9 10/09 deleted the standard part numbers from the ordering information table 1 10 4/11 updated ul certificate reference; deleted from the t w1l specification in the electrical characteristics table; applied note 14 to the t w0l specification in the electrical characteristics table; added more details to electrical characteristics table notes 5, 14, and 15; revised the last sentence of the parasite power section for more clarity; added paragraph on validation certificates to detailed description section; added more details on the device samples counter in the other indicators section 1, 3, 4, 13, 25 11 6/13 removed the ul 913 5th ed. compliance statement from the common ibutton device features section and ibutton can physical specification table; reworded the electrical characteristics table note 19 1, 4 12 11/13 added the busy state during copy scratchpad to the command-specific 1-wire communication protocollegend and 1-wire communication examples sections 45, 46 13 3/15 updated benefits and features and common ibutton device features section 1, 51 downloaded from: http:///

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